Artesyn MVME6100 Single Board Computer Installation and Us User Manual Page 73

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Functional Description
MVME6100 Single Board Computer Installation and Use (6806800D58H)
73
4.10 System Memory
MVME6100 system memory consists of double-data-rate SDRAMs. The DDR SDRAMs support
two data transfers per clock cycle. The memory device is a standard monolithic (32M x 8 or
64M x 8) DDR, 8-bit wide, 66-pin, TSSOPII package. Both banks are provided on board the
MVME6100 and operate at 133 MHz clock frequency with both banks populated.
4.11 Asynchronous Serial Ports
The MVME6100 board contains one EXAR ST16C554D quad UART (QUART) device connected
to the MV64360 device controller bus to provide asynchronous debug ports. The QUART
supports up to four asynchronous serial ports, two of which are used on the MVME6100.
COM1 is an RS232 port and the TTL- level signals are routed through appropriate EIA-232
drivers and receivers to an RJ-45 connector on the front panel. Unused control inputs on COM1
and COM2 are wired active. The reference clock frequency for the QUART is 1.8432 MHz. All
UART ports are capable of signaling at up to 115 Kbaud.
4.12 PCI Mezzanine Card Slots
The MVME6100 board supports two PMC slots. Two sets of four EIA-E700 AAAB connectors are
located on the MVME6100 board to interface to the 32-bit/64-bit IEEE P1386.1 PMC to add any
desirable function. The PMC slots are PCI/PCI-X 33/66/100 capable.
PMC/IPMC slot 1 supports:
Mezzanine Type: PMC/IPMC = PCI Mezzanine Card
Mezzanine Size: S1B = Single width and standard depth
(75mm x 150mm) with front panel
PMC Connectors: J11, J12, J13, and J14 (32/64-bit PCI with front and rear I/O)
Signaling Voltage: VIO = +3.3V (+5V tolerant) or +5V, selected by keying pin
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